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abe
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 Posted: Tue Nov 18, 2008 10:15 pm Post subject: opinion about various code generators |
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does anybody have a clear opinion about code generators ( c-> vhdl ,
matlab-> vhdl, etc..) that are around? Are they really irreplaceable
in complex applications (i.e DSP) as the vendors say? |
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Dave
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| Posted: Wed Nov 19, 2008 2:38 am Post subject: Re: opinion about various code generators |
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On Nov 18, 5:15 pm, abe <a.bergn...@gmail.com> wrote:
| Quote: | does anybody have a clear opinion about code generators ( c-> vhdl ,
matlab-> vhdl, etc..) that are around? Are they really irreplaceable
in complex applications (i.e DSP) as the vendors say?
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Maybe they work great, maybe not. I think that it is safe to say,
however, that the statement that they are irreplaceable for complex
applications is ridiculous, pure marketing with no technical basis.
Dave |
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Glen Herrmannsfeldt
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| Posted: Wed Nov 19, 2008 5:47 am Post subject: Re: opinion about various code generators |
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abe wrote:
| Quote: | does anybody have a clear opinion about code generators ( c-> vhdl ,
matlab-> vhdl, etc..) that are around? Are they really irreplaceable
in complex applications (i.e DSP) as the vendors say?
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Having written some complex algorithms in verilog that
(in the form of systolic arrays), I am not convinced at
all that such generators are the way to go.
I am willing to be convinced, but at least for the problems
I have worked on the algorithm looked so different that there
is no way a program could figure it out.
-- glen |
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Thomas Stanka
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| Posted: Wed Nov 19, 2008 6:57 am Post subject: Re: opinion about various code generators |
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Hello,
On 18 Nov., 23:15, abe <a.bergn...@gmail.com> wrote:
| Quote: | does anybody have a clear opinion about code generators ( c-> vhdl ,
matlab-> vhdl, etc..) that are around? Are they really irreplaceable
in complex applications (i.e DSP) as the vendors say?
|
You could typically abstract on a higher level when using matlab or
reuse existing c code when using c. This is really a benefit, when it
comes to complex systems. But you also loose in abstraction.
It is usually not possible to model more than clocked events on
description as well as during simulation. This speeds up your
simulation drastically on cost of the benefits of timing aware
simulation.
The tools I inspected are not able to handle even two independend
clock domains properly.
If your design is not timing critical nor area critical, has only one
clock domain and needs no special cells, than you should be the
perfect customer for tools like CatapultC or mathlab synthesis.
DSP may be a good field for such designs.
But I doubt at the moment that such a customer has the need to spend
lot of money to design in an other language.
bye Thomas |
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Andy
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| Posted: Wed Nov 19, 2008 6:03 pm Post subject: Re: opinion about various code generators |
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On Nov 19, 10:07 am, Mike Treseler <mtrese...@gmail.com> wrote:
| Quote: | abe wrote:
does anybody have a clear opinion about code generators ( c-> vhdl ,
matlab-> vhdl, etc..) that are around? Are they really irreplaceable
in complex applications (i.e DSP) as the vendors say?
My only clear opinion is that
many code generators create very ugly text.
I have used python and maple to work out the math
before I write my own code, and it seems plausible
to me that something like the matlab -> hdl products
*might* be practical.
I just haven't seen or heard any direct evidence.
-- Mike Treseler
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While I would hardly rate ANY product as "irreplaceable as its
vendors' claims," I have used CatapultC and found it helpful for
certain things, mostly in the form of "what-if" type trades. The tool
allows you to play around with a variety of input and output interface
types, and lets you see where expensive resources may be shared. The
best part is that it creates all the sequence control logic for
sharing resources for you, so evaluating different trades is less
painful. It also has a powerful tool for using original algorithmic
testing code in C to cosimulate with the HDL implementation in a
testbench.
It is in no way a tool for writing RTL in C, but at its untimed level
of abstraction, it does a good job in giving you the freedom to
relatively easily explore different effects on latency/throughput for
various implementations.
Andy |
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Mike Treseler
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| Posted: Wed Nov 19, 2008 10:07 pm Post subject: Re: opinion about various code generators |
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abe wrote:
| Quote: | does anybody have a clear opinion about code generators ( c-> vhdl ,
matlab-> vhdl, etc..) that are around? Are they really irreplaceable
in complex applications (i.e DSP) as the vendors say?
|
My only clear opinion is that
many code generators create very ugly text.
I have used python and maple to work out the math
before I write my own code, and it seems plausible
to me that something like the matlab -> hdl products
*might* be practical.
I just haven't seen or heard any direct evidence.
-- Mike Treseler |
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David Brown
Guest
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| Posted: Mon Nov 24, 2008 9:15 am Post subject: Re: opinion about various code generators |
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Mike Treseler wrote:
| Quote: | abe wrote:
does anybody have a clear opinion about code generators ( c-> vhdl ,
matlab-> vhdl, etc..) that are around? Are they really irreplaceable
in complex applications (i.e DSP) as the vendors say?
My only clear opinion is that
many code generators create very ugly text.
I have used python and maple to work out the math
before I write my own code, and it seems plausible
to me that something like the matlab -> hdl products
*might* be practical.
I just haven't seen or heard any direct evidence.
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Have you looked at MyHDL (www.myhdl.org) ? You might be able to get
python test code and vhdl/verilog generation from the same source. |
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Mike Treseler
Guest
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| Posted: Tue Nov 25, 2008 7:47 am Post subject: Re: opinion about various code generators |
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David Brown wrote:
| Quote: | Have you looked at MyHDL (www.myhdl.org) ?
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Yes, it is a big step in the right direction.
Just the thing cover math with generated verilog code.
| Quote: | You might be able to get
python test code and vhdl/verilog generation from the same source.
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Last I looked, vhdl output has some assembly required.
-- Mike Treseler |
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