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knight
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 Posted: Fri Nov 14, 2008 8:52 am Post subject: MAC PHY Configuration |
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Hi
I have been using an emac core to be implemented as standalone in an
FPGA.
I was successful in implementing the core, but failed in PHY layer.
Im using an SMSC MII 83C185 chip and i have been trying to configure
it through an MDIO interface which i seperately implemented (not the
one comes with the core).
I have clocked the MDC at 1Mhz(specifications tell it to be no greater
then 2.5Mhz). And i have been trying to write the registers for PHY
configuration.
In this regard i failed even though i have not found any timing
mismatch between signals.
So i tried to crack down the problem. I tried a working processor core
implementation for ethernet in a starter kit and i tried to read the
MDC clock and MDIO data.
To my surprise i have not found a single state change in the MDC pin
(no clock) and MDIO data itself is held at low all the time.I have
seen the specs
and found that the operating mode configuration pins brought outside
the chip are left floating(the chip is not hardware configured)
Doesn't the PHY require to be configured through MDIO interface before
data transfer..?
How can this be possible..?
Is there any other way to configure the PHY other than fixed hardware
and MDIO software configuration..?
regards
knight |
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MM
Guest
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| Posted: Sat Nov 15, 2008 1:09 am Post subject: Re: MAC PHY Configuration |
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"knight" <krsheshu@gmail.com> wrote in message
news:6fa212ab-0906-4690-8732-bab276868e3d@a26g2000prf.googlegroups.com...
| Quote: |
Doesn't the PHY require to be configured through MDIO interface before
data transfer..?
How can this be possible..?
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I believe a default PHY configuration is good enough in many cases. If it is
not good enough in your case you need to use MDIO and/or hardware settings.
/Mikhail |
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Jeff Cunningham
Guest
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| Posted: Mon Nov 17, 2008 6:33 am Post subject: Re: MAC PHY Configuration |
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Knight,
This may be of help:
http://www.xilinx.com/support/answers/24494.htm
I tried to get the hard temac's MDIO interface working on a V4 in 10.1
and eventually gave up working on it. I would see device addresses 0 and
1 return some of what looked like phy registers, even though I only had
device 0 hooked up. Fortunately the default phy settings have been
sufficient. I'd be really curious if you get this working.
-Jeff |
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