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adonis
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 Posted: Sun Oct 12, 2008 7:56 pm Post subject: nonlinear pipeline |
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where does nonlinear pipeline used?
one of it's usages is in floating point add.
what are the other?
please help me. |
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Terje Mathisen
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| Posted: Mon Oct 13, 2008 8:15 am Post subject: Re: nonlinear pipeline |
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adonis wrote:
| Quote: | where does nonlinear pipeline used?
one of it's usages is in floating point add.
what are the other?
please help me.
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Since you obviously need help on your CompSci lessons, I'll try:
Non-linear pipes obviously has to be used anywhere you cannot predict
the actual flow rate, right?
From this it seems like you'll need it in the branch prediction units
as well as the interrupt handling modules!
Terje
--
- <Terje.Mathisen@hda.hydro.com>
"almost all programming can be viewed as an exercise in caching" |
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MitchAlsup
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| Posted: Mon Oct 13, 2008 3:08 pm Post subject: Re: nonlinear pipeline |
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On Oct 13, 12:54 am, Terje Mathisen <terje.mathi...@hda.hydro.com>
wrote:
You know very well that there is another kind of non-linear pipeline.
These are pipelines where the executing instruction can be stopped/
stalled on 1/2 cycle boundaries. In fact, with a good control engine,
one can pack 5 (2*n-1) instruction into a 3 (n) deep pipeline by
stopping them on consecutive latch boundaries in the pipe. It may take
som exotic clock control circuits, but its not really that hard to
pull off.
Mitch |
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Terje Mathisen
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| Posted: Tue Oct 14, 2008 1:01 am Post subject: Re: nonlinear pipeline |
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MitchAlsup wrote:
| Quote: | On Oct 13, 12:54 am, Terje Mathisen <terje.mathi...@hda.hydro.com
wrote:
Terje
You know very well that there is another kind of non-linear pipeline.
These are pipelines where the executing instruction can be stopped/
stalled on 1/2 cycle boundaries. In fact, with a good control engine,
one can pack 5 (2*n-1) instruction into a 3 (n) deep pipeline by
stopping them on consecutive latch boundaries in the pipe. It may take
som exotic clock control circuits, but its not really that hard to
pull off.
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Pentium 4 is probably the best known core which used 1/2 cycle
boundaries everywhere, i.e. anything that would fit inside the "fast
core" ran at twice the actual clock speed.
Terje
--
- <Terje.Mathisen@hda.hydro.com>
"almost all programming can be viewed as an exercise in caching" |
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